Industry Council on ESD Target Levels
The Industry Council on ESD Target Levels, which was founded by a group of semiconductor manufacturers in 2006 and was joined in the following years by other semiconductor manufacturers and even system manufacturers, has published several white papers, which can be downloaded below for further discussion:
- White Paper 1 (Rev. 4): A Case for Lowering Component Level HBM/MM ESD Specifications and Requirements
- White Paper 2 (Rev. 2): A Case for Lowering Component Level CDM ESD Specifications and Requirements
- White Paper 3 System Level ESD Part I (Rev. 1): Common Misconceptions and Recommended Basic Approaches
- White Paper 3 System Level ESD Part II (Rev. 2): Implementation of Effective ESD Robust Designs
Discussion of White Paper 1
The proposals of the Industry Council to lower the minimum HBM and MM target levels of components were intensively and controversially discussed by the participants of the ESD-Forum 2007 and the ESD-Workshop 2008.
The reason for this discussion was a different perspective as the relation between the HBM robustness on component level (transistors, ICs, etc.) and the ESD robustness on system level (assembled PCB, modules, equipment, etc.) is concerned. Some participants assumed, that the HBM robustness on component level would correlate with the ESD robustness on system level. As a result, they were afraid, that the system-level ESD robustness of exposed IC pins would suffer from a reduced HBM robustness on component level. To avoid this risk, the Industry Council was asked to work out proposals, in order to improve the ESD robustness of these pins on system level. Furthermore, the question was raised, which IC pins would have to be regarded as "exposed" and hence critical and who should categorize these pins into "exposed" and "not exposed" pins. After all, a given IC pin could be both exposed and not exposed depending on its particular application. In an attempt to answer this question, it was argued that the ESD protection on system level falls into the responsibility of the system designer, who consequently would have to take care that pins lacking a sufficient system-level ESD protection would not be directly connected to any interface connection of a given system. In order to support system designers with the design of a suitable external ESD protection of exposed pins with reduced HBM robustness, it was proposed to add the TLP characteristics of the ESD protection integrated with corresponding ICs to their data sheets.
Another reason for the controversial discussion was the lack or availability of field return statistics recorded by system manufacturers that would allow to attribute these returns to ESD failures. As a result, participants of these system manufacturers could neither confirm nor refute the statistics reported by the Industry Council. Nevertheless, the reported failure statistics of automotive ICs was regarded as not very meaningful, since the failure rates of corresponding ICs are generally very small due to the high requirements of the automotive industry. As a reply, it was argued that the automotive industry has so far not published any data, that would substantiate the need for an ESD robustness of 2kV HBM on component level.
Nevertheless, many participants confirmed, that they have no significant ESD problems in their manufacturing floors. This includes companies, that have implemented only minimum ESD control methods. Furthermore, the conclusion of the Industry Council on safe HBM target levels of components was definitely confirmed by some participants. It was reported for instance, that only components with an HBM robustness less equal 500 V were marked as "sensitive". In the same connection it was explained by another system manufacturer, that the minimum HBM requirement for supplied components was set to 800 V; special release procedures are only required for components that do not meet this target value.
Still, in particular the participants of the automotive industry were hesitant to accept the proposals of the Industry Council, because they were afraid that the proposed minimum target levels could cause ESD problems.
Although, the discussion has shown that the customers of semiconductor manufacturers deal seriously with the proposals of the Industry Council, a consensus was not reached.
Investigation of the impact of White Paper 1
As a result of intensive discussions, the ESD FORUM e.V. has commissioned an investigation on the impact of the proposed lowering of HBM target levels on the system-level ESD robustness. The final report of this investigation can be downloaded below:
Other documents of the Industry Council on ESD Target Levels can be downloaded below: